11/7/2023 0 Comments Transistor gate creator![]() ![]() Likewise when the Vin is High, the NMOS is turned on and can sink current, but the PMOS is now off and cannot source current. As a result, the Vout pin tries to put charge onto any available capacitance and charges that capacitance up until it reaches the V+ level. When Vin is at ground, the PMOS is turned on and can source current, but the NMOS is off and cannot sink current. You will notice that already we are using logic language to describe function (AND, OR) so now we can start piecing together circuits. You could say that "either A OR B can be low for current to flow" for the PMOS and you could say that "either C OR D can be high for current to flow" for the NMOS circuit. Just like you can "stack" (actually put in series), you can parallel devices. You could say "Both A AND B have to low for current to flow" and "Both C AND D have to be high for current to flow". Also notice that Both C and D have to be higher than Ground (that funny hatched triangle symbol) for current to be sinked (sunk ?). Notice that both Voltage at A (we'll call it A) and B BOTH have to be below +V for current to flow. Stacking two PMOS gives a current source that is controlled by two voltages, stacking two NMOS gives a current sink that is controlled by two voltages. Interestingly you can stack the devices to make various functions. PMOS is usually connected to a positive voltage and NMOS is usually connected to negative voltages typically ground. Please note that I've taken some liberties with naming for the sake of clarity. The NMOS will sink current into ground through the drain into the source (which in this case you should think of as a sink). ![]() The PMOS will source current (the dotted line in the diagram shows current flow when on) from a power supply (attached to source) through the drain and into other circuits when the Gate voltage is LOWER than the source. The transistors are electrically controlled current sources/sinks. There are two kinds of transistors used, PMOS and NMOS, here are their symbols: I will deal with CMOS since 99% of all logic that has ever existed (in number count) exists as CMOS. To start with you have to understand transistors in a simple way. If either or both of the inputs is high, the output is driven low.I've turned this into a community wiki so we can collect cool logic gate implementations to which to refer to in the future. In this alternative way to achieve NOR logic, only one transistor is used with the two inputs tied to its base through resistors. When the base-emitter diode is turned on enough to be driven into saturation, the collector voltage with respect to the emitter may be near zero and can be used to construct gates for the TTL logic family. The use of transistors for the construction of logic gates depends upon their utility as fast switches. For the NOR logic, the transistors are in parallel with the output above them so that if either or both of the inputs are high, the output is driven low. ![]() The output is high unless both A and B inputs are high, in which case the output is taken down close to ground potential. For the NAND logic, the transistors are in series, but the output is above them. For the OR logic, the transistors are in parallel and the output is driven high if either of the transistors is conducting. HyperPhysics***** Electricity and magnetism For the AND logic, the transistors are in series and both transistors must be in the conducting state to drive the output high. ![]()
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